Discover how Intel Celeron processor features and benefits can enhance your basic computing experience:

Product Highlights

• Available at 400, 366, 333, 300A, 300 and 266 MHz.
• The Intel Celeron processor at 400 MHz (availability may vary by country) delivers 13% more integer performance (as measured by SYSmark*98), 14% more multimedia performance (as measured by Norton* Media Benchmark), and 19% more floating point performance (as measured by FPUmark*) than the Intel Celeron processor at 333 MHz.
• Includes Intel MMX™ media enhancement technology.
• Offers Dynamic Execution technology.
• Includes a 32Kbyte (16Kbyte/16Kbyte) non-blocking, level-one cache that provides fast access to heavily used data.
• Intel Celeron processors at 400, 366, 333 and 300A MHz include integrated L2 cache 128Kbyte.
• All the Intel Celeron processors utilize the Intel P6 microarchitecture's multi-transaction system bus at 66MHz. The 400, 366, 333 and 300A MHz processors utilize the Intel P6 microarchitecture's multi-transaction system bus with the addition of the L2 cache interface. The combination of the L2 cache bus and the processor-to-main-memory system bus increases bandwidth and performance over single-bus processors.
• The Intel® 440EX and Intel® 440ZX-66 AGPset optimizes the overall system performance of Intel Celeron processor-based systems.
• All processors are available in the single edge processor package (S.E.P.P.) form factor, which maintains compatibility with the 242-contact slot connector. The 400, 366, 333, and 300A processors are also available in a plastic pin grid array (P.P.G.A.) form factor which is compatible with the 370 pin socket.

P6 Microarchitecture Dynamic Execution Technology

Multiple Branch Prediction: Predicts program execution through several branches, accelerating the flow of work to the processor.
Dataflow Analysis: Creates an optimized, reordered schedule of instructions by analyzing data dependencies between instructions.
Speculative Execution: Carries out instructions speculatively and based on this optimized schedule, ensures that the processor’s superscalar execution units remain busy, boosting overall performance.

Intel® MMX™ Media Enhancement Technology

Intel MMX technology includes new instructions and data types that allow applications to achieve a new level of performance. Intel’s MMX technology is designed as a set of basic, general-purpose integer instructions that are easily applied to the needs of a wide diversity of multimedia and communications applications. The highlights of the technology are:

• Single Instruction, Multiple Data (SIMD) technique
• 57 new instructions
• Eight 64-bit wide MMX technology registers
• Four new data types

Other Significant Features

• Single edge processor package (S.E.P.P.), which is similar to the single edge contact (S.E.C.) cartridge form factor that the Pentium II processor uses, and maintains compatibility with the 242-contact slot connector. This packaging technology features a P6-microarchitecture-based core processor on a single-sided substrate without BSRAM componentry. It does not have a thermal plate or cover. The 0.25 micron manufacturing process, which reduces processor heat, enables the Intel Celeron processor to use a smaller heat sink. Also, the Intel Celeron processor uses newer Retention Mechanisms that are designed to fit the S.E.P.P. form factor. The S.E.P.P. form factor is available for all Intel Celeron processors.
• Plastic pin grid array (PPGA) package, available on the 400, 366, 333, 300A MHz processors. The PPGA package is compatible with the 370 pin socket and provides more flexibility to design low cost systems by enabling lower profile and smaller systems and providing the potential for reducing costs of processor retention and cooling solutions. Like the Intel Celeron processors that utilize S.E.P.P., the Intel Celeron processors that use P.P.G.A., feature a P6-microarchitecture-based core processor on a single-sided substrate without BSRAM componentry.
• The system bus supports multiple outstanding transactions to increase bandwidth availability.
• Incorporates separate 16Kbyte level-one caches, one for instructions and one for data.
• 400, 366, 333 and 300A MHz parts have a 128Kbyte unified, non-blocking, level-two cache that improves performance by reducing the average memory access time and providing fast access to recently used instructions and data. Performance is enhanced through a dedicated 64-bit cache bus. The speed of the level-two cache scales with the processor core frequency.
• A pipelined Floating-Point Unit (FPU) for supporting the 32-bit and 64-bit formats specified in IEEE standard 754, as well as an 80-bit format.
• Parity-protected address/request and response system bus signals with a retry mechanism for high data integrity and reliability.

Testing and Performance Monitoring Features

• Built-in Self Test (BIST), providing single stuck-at fault coverage of the microcode and large logic arrays, as well as testing of the instruction cache, data cache, Translation Lookaside Buffers (TLBs) and ROMs.
• IEEE 1149.1 Standard Test Access Port and Boundary Scan mechanism, enables testing of the Intel Celeron processor and system connections through a standard interface.
• Internal performance counters for performance monitoring and event counting.

Performance Specifications